74HC194 Shift Register 4-Bit - 74194

The 74HC194 is a 4-bit CMOS bidirectional universal Shift Register with an asynchronous master RESET (MR\). In the parallel mode (S0 and S1 are high), data is loaded into the associated flip-flop and appears at the output after the positive transition of the clock input (CP). During parallel loading serial data flow is inhibited. Shift left and shift right are accomplished synchronously on the positive clock edge with serial data entered at the shift left (DSL) serial input for the shift right mode and at the shift right (DSR) serial input for the shift left mode. Clearing the register is accomplished by a low applied to the master RESET (MR\) pin.

Applications

Communications & Networking

Features

• Shift right, shift left, hold and reset operation modes
• Synchronous parallel or serial operation
• Asynchronous master reset
• Balanced propagation delay and transition times
• Significant power reduction compared to LSTTL logic ICs
• High noise immunity
• Direct LSTTL input logic compatibility
• CMOS Input compatibility
• 10 LSTTL Loads standard outputs
• 15 LSTTL Loads bus driver outputs
• Green product and no Sb/Br

Specifications

• Logic Family : HC
• Bits Per Element: 4-Bit
• Logical Function : Shift Register
• Operating Supply Voltage (Typ) : 5V
• Operating Supply Voltage (Min) : 2V
• Operating Supply Voltage (Max) : 6V
• Operating Temp Range : -40C to 85C
• No. of Pins: 16 Pins
• Package Type : DIP

Package Content

1 x 74HC194N